Techniques to form highly integrated circuits frequently use multi-level electrical interconnects to provide electrical connections between individual devices within logic gates and other active components within integrated circuits. Conventional techniques to form electrical interconnects can include dividing electrically conductive line segments (e.g., polysilicon line segments) into respective electrical interconnects to achieve high integration density. For example, FIG. 1A illustrates a rectangular mask pattern 10 that may be provided on a photolithography mask. This mask pattern 10 may be used during a photolithography process to pattern a layer of photoresist material on an integrated circuit substrate.
As illustrated by FIG. 1B, a patterned layer of photoresist material 10a within highlighted region 1B, which may have a generally rectangular shape derived from the shape of the mask pattern 10, may be utilized to break parallel electrically conductive line segments 12a, 12b (e.g., polysilicon lines) into respective pairs of electrical interconnects, which may be independently contacted during subsequent process steps using vertical interconnect techniques that may form electrically conductive “plugs” within interlayer insulating layers. In particular, FIG. 1B demonstrate ,that when the dimensions A and B within the patterned layer of photoresist material 10a are equal, the electrically conductive line segments 12a, 12b may be cut relatively cleanly so that opposing ends of the pairs of electrical interconnects may have faces that intersect at approximately perpendicular angles with the sides of the interconnects. In contrast, FIG. 1C demonstrates that when the dimension A is less than the dimension B within a patterned layer of photoresist material 10b highlighted by region 1C, the electrically conductive line segments 12a′, 12b′ may be cut nonuniformly with ends extending at acute or obtuse angles relative to each other. As will be understood by those skilled in the art, when the dimension B is greater than the dimension A, it may be more difficult to reliably contact the ends of the interconnects with vertically-extending interconnects (e.g., vertical “plugs”), which are formed during subsequent process steps.